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STMicroelectronics introduce galvanically isolated dual SiC gate driver with 4 A current capability, evaluation board available from Anglia

STMicroelectronics have launched the STGAP2SiCD a dual gate driver for SiC MOSFETs which provides galvanic isolation between each gate driving channel and the low voltage control and interface circuitry.

The STGAP2SiCD is a flexible and compact gate driver with 4 A output current capability and rail-to-rail outputs, the device allows implementation of either unipolar or bipolar gate driving making it suitable for mid and high-power applications such as power conversion and industrial motor driver inverters. The device features separated output pins that allow users to independently optimize turn-on and turn-off by using dedicated gate resistors, while an integrated Miller CLAMP function helps avoid gate spikes during fast commutations in half-bridge topologies. The device allows implementing negative gate driving, and the on-board isolated DC-DC converters allow working with optimized driving voltages for MOSFET and IGBT.

Free Samples and Evaluation Board   
Key Features
  • 6 kV galvanic isolation
  • High voltage rail up to 1200 V
  • Driver current capability: 4 A sink/source @ 25 °C
  • dV/dt transient immunity ±100 V/ns
  • Overall input-output propagation delay: 75 ns
  • Separate sink and source option for easy gate driving configuration
  • 4 A Miller CLAMP
  • UVLO function
  • Configurable interlocking function
  • Dedicated SD and BRAKE pins
  • Gate driving voltage up to 26 V
  • 3.3 V, 5 V TTL/CMOS inputs with hysteresis
  • Temperature shutdown protection
  • Standby function
  • Wide Body SO-36W
Data

 

Block Diagram


Source: STMicroelectronics STGAP2SiCD Datasheet

The STGAP2SiCD device integrates a number of protection functions: dedicated SD and BRAKE pins are available, UVLO and thermal shutdown are included to easily design high reliability systems. In half-bridge topologies the interlocking function prevents outputs from being high at the same time, avoiding shoot-through conditions in case of wrong logic input commands. The interlocking function can be disabled by a dedicated configuration pin, thus allowing independent and parallel operation of the two channels. The input to output propagation delay results are contained within 75 ns, providing high PWM control accuracy and a standby mode is available in order to reduce idle power consumption. The galvanically isolated HV side of the device also has a watchdog function which can identify when it is not able to communicate with LV side, for example because the VDD of the LV side is not supplied. In this case the output of the driver is forced in “safe state” until communication link is properly established again.

The STGAP2SiCD device is available in the wide body SO-36W package and has a specified operating temperature range of -40°C to +125°C.

Evaluation Board

Support for developers is provided by the EVALSTGAP2SiCD demonstration board which allows evaluation of all the STGAP2SiCD features while driving a half-bridge power stage with voltage rating up to 1200 V in TO-220 or TO-247 package. The board allows easy selection and modification of values of relevant external components to simplify driver performance evaluation under different application conditions and fine pre-tuning of final application components.

The STGAP2SiCD galvanically isolated dual gate driver is suitable for a wide range of applications including: Motor driver for industrial drives, factory automation, home appliances and fans, 600/1200 V inverters, Battery chargers, Induction heating, Welding, UPS, Power supply units, DC-DC converters and Power Factor Correction.

Anglia are offering customers a FREE evaluation board for the STGAP2SiCD galvanically isolated SiC gate driver from STMicroelectronics, please fill in the form below to register your interest now.

To register for a FREE evaluation board for the STGAP2SiCD galvanically isolated SiC gate driver from STMicroelectronics, please fill in the form below

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Free samples are subject to availability.

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